Local interconnect network (LIN) is a communication protocol that combines sensors, actuators, and processors to a functional module in automotive applications. In this paper, a LIN ver. 2.2A controller was designed in Verilog hardware description language (Verilog HDL) and implemented in field-programmable gate array (FPGA). Its operation was verified by making full-scale LIN network with the presented FPGA-implemented LIN controller, commercial LIN transceivers, and commercial processors. When described in Verilog HDL and synthesized in 0.18 μm technology, its gate size was about 2,300 gates.
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 ISO SC31, ISO 11898-1:2015, “Road vehicles - Controller area network (CAN) - Part 1: Data link layer and physical signaling”, http://www.iso.org/iso/home/store/catalogue_tc/catalogue_detail.htm?csnumber=63648, (Accessed on 30 Sep. 2016).
 ISO SC31, ISO 17987-1:2016, “Road vehicles - Local Interconnect Network (LIN) - Part 1: General information and use case definition”, http://www.iso.org/iso/home/store/catalogue_tc/catalogue_detail.htm?csnumber=61222, (Accessed on 30 Sep. 2016).
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 J. Lee and S. Lee, “Implementation of the LIN Controller Using Verilog HDL”, in Proc. of IKEEE Summer Conference, 2016, pp. 1-2
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