In this paper, we propose a chaotic cipher system consisting of Improved Volterra Filters and the mapping that is created from the actual voice by using Radial Basis Function Network. In order to achieve a practical system, the system supposes to use the digital communication line, such as the Internet, to maintain the parameter matching between the transmitter and receiver sides. Therefore, in order to withstand the attack from outside, it is necessary that complicate the internal state and improve the sensitivity coefficient. In this paper, we validate the robustness of proposed method from three perspectives of "Chaotic properties", "Randomness", "Coefficient sensitivity".
In this paper, we validate crater detection in moon surface image using FLDA. This proposal assumes that it is applied to SLIM (Smart Lander for Investigating Moon) project aiming at the pin-point landing to the moon surface. The point where the lander should land is judged by the position relations of the craters obtained via camera, so the real-time image processing becomes important element. Besides, in the SLIM project, 400kg-class lander is assumed, therefore, high-performance computers for image processing cannot be equipped. We are studying various crater detection methods such as Haar-Like features, LBP, and PCA. And we think these methods are appropriate to the project, however, to identify the unlearned images obtained by actual is insufficient. In this paper, we examine the crater detection using FLDA, and compare with the conventional methods.
In this study, we propose the chaotic cipher combined with Mersenne Twister that is an extremely good pseudo-random number generator for the secure communications. We investigate the Lyapunov exponent of the proposed system, and evaluate the randomness performance by comparing RC4 and the chaotic cipher. In these results, our proposed system gets high chaotic property and more randomness than the conventional ciphers.
In previous study, technique to estimate a self-location by using a lunar image is proposed.We consider the improvement of the conventional method in consideration of FPGA implementationin this paper. Specifically, we introduce Artificial Bee Colony algorithm for reduction of search time.In addition, we use fixed point arithmetic to enable high-speed operation on FPGA.