Conference Code: 20AU03ICHCE
The International Research Conference Aims and Objectives
The International Research Conference is a federated organization dedicated to bringing together a significant number of diverse scholarly events for presentation within the conference program. Events will run over a span of time during the conference depending on the number and length of the presentations.
ICHCE 2020: International Conference on Hardware and Computer Engineering aims to bring together leading academic scientists, researchers and research scholars to exchange and share their experiences and research results on all aspects of Hardware and Computer Engineering. It also provides a premier interdisciplinary platform for researchers, practitioners and educators to present and discuss the most recent innovations, trends, and concerns as well as practical challenges encountered and solutions adopted in the fields of Hardware and Computer Engineering.
Call for Contributions
Prospective authors are kindly encouraged to contribute to and help shape the conference through submissions of their research abstracts, papers and e-posters. Also, high quality research contributions describing original and unpublished results of conceptual, constructive, empirical, experimental, or theoretical work in all areas of Hardware and Computer Engineering are cordially invited for presentation at the conference. The conference solicits contributions of abstracts, papers and e-posters that address themes and topics of the conference, including figures, tables and references of novel research materials.
WASET
Conference Proceedings
All submitted conference papers will be blind peer reviewed by three competent reviewers. The peer-reviewed conference proceedings are indexed in the
Open Science Index,
Google Scholar,
Semantic Scholar,
Zenedo,
OpenAIRE,
BASE,
WorldCAT,
Sherpa/RoMEO, and other index databases.
Impact Factor Indicators.
Special Journal Issues
ICHCE 2020 has teamed up with the Special Journal Issue on
Hardware and Computer Engineering.
A number of selected high-impact full text papers will also be considered for the special journal issues. All submitted papers will have the opportunity to be considered for this Special Journal Issue. The paper selection will be carried out during the peer review process as well as at the conference presentation stage. Submitted papers must not be under consideration by any other journal or publication. The final decision for paper selection will be made based on peer review reports by the Guest Editors and the Editor-in-Chief jointly. Selected full-text papers will be published online free of charge.
Conference Sponsor and Exhibitor Opportunities
The Conference offers the opportunity to become a conference sponsor or exhibitor. To participate as a sponsor or exhibitor, please download and complete
the Conference Sponsorship Request Form.
Important Dates
| Abstracts/Full-Text Paper Submission Deadline |
|
February 27, 2020 |
| Notification of Acceptance/Rejection |
|
March 12, 2020 |
| Final Paper (Camera Ready) Submission & Early Bird Registration Deadline |
|
February 28, 2020 |
| Conference Dates |
|
March 26 - 27, 2020 |
Important Notes
Please ensure your submission meets the conference's strict guidelines for accepting scholarly papers. Downloadable versions of the check list for
Full-Text Papers and
Abstract Papers.
Please refer to the
Paper Submission GUIDE before submitting your paper.
Selected Conference Papers
1) Evaluating the Impact of Replacement Policies on the Cache Performance and Energy Consumption in Different Multicore Embedded SystemsSajjad Rostami-Sani, Mojtaba Valinataj, Amir-Hossein Khojir-Angasi 2) Verification and Proposal of Information Processing Model Using EEG-Based Brain Activity MonitoringToshitaka Higashino, Naoki Wakamiya 3) The Fluid Limit of the Critical Processor Sharing Tandem QueueAmal Ezzidani, Abdelghani Ben Tahar, Mohamed Hanini 4) Single Event Transient Tolerance Analysis in 8051 Microprocessor Using Scan ChainJun Sung Go, Jong Kang Park, Jong Tae Kim 5) CPU Architecture Based on Static Hardware Scheduler Engine and Multiple Pipeline RegistersIonel Zagan, Vasile Gheorghita Gaitan 6) Improving the Performances of the nMPRA Architecture by Implementing Specific Functions in HardwareIonel Zagan, Vasile Gheorghita Gaitan 7) IntelliCane: A Cane System for Individuals with Lower-Limb Mobility and Functional ImpairmentsAdrian Bostan, Nicolae Tapus, Adriana Tapus 8) Parallel Vector Processing Using Multi Level Orbital DATANagi Mekhiel 9) Massively-Parallel Bit-Serial Neural Networks for Fast Epilepsy Diagnosis: A Feasibility StudySi Mon Kueh, Tom J. Kazmierski 10) Design of Local Interconnect Network Controller for Automotive ApplicationsJong-Bae Lee, Seongsoo Lee 11) Innovative Power Engineering in a Selected Rural CommunePawel Sowa, Joachim Bargiel 12) Performance Evaluation of a Prioritized, Limited Multi-Server Processor-Sharing System That Includes Servers with Various CapacitiesYoshiaki Shikata, Nobutane Hanayama 13) 3A Distributed Method Algorithm for Exact Side Load Managing Smart Grid Using LABVIEWN. Ravi Kumar, R. Kamalakannan 14) Simulation of Utility Accrual Scheduling and Recovery Algorithm in Multiprocessor EnvironmentA. Idawaty, O. Mohamed, A. Z. Zuriati 15) A Methodology for the Synthesis of Multi-ProcessorsHamid Yasinian
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